IntegrationDaq 240517
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Meeting information
Meeting time: 1:00pm Eastern Zoom connection information is sent out by email; please reach out to Paul if you don't have the current link.
Agenda
- Activity updates
- General discussion
Open Issues to be followed up later
- Discussions with M. Pitt & J. Musson to understand the beam monitor signals we'll be getting
- Draft timing diagram: DocDB 790
- Michael, Bob, Brynne, and Paul should put together a list of the integrator running modes we would like to have available
Minutes
Recording at zoomgov: [1]
Participants: B. Moffit, P. King, R. Michaels, A. Sen, R. Fair, M. Gericke, S. Chatterjee, D. Bishop, B. Blaikie, J. Pan, W. Gu, S. Regmi, K. Dehmelt, D. McNulty, R. Conaway, Z. Ji
- Discussing the streaming mode and the latency studies
- Michael says that right now the gate input in the back of the board is in the streaming mode data along with the two channels that are being streamed. For each sample that gets read out, you have the data for the two channels, and a bit for each of the two gate input signals, plus a timestamp.
- If that is also true for the TI "integrate start" signal, then we can probably use the streaming mode to do the latency studies
- Michael shows an early test where the input signal on the integrator is compared to the backpanel gate input
- William asks if we'd be able to include samples before the trigger arrival in the integrals; Daryl thinks there is some number of sample lookback but would need to ask Bryerton
- Discussing the control of the timing of the gate/trigger
- William says there are three points we can put a delay in the trigger signal: the master TI can add delay between the trigger input and sending the trigger, the TI-bridge can delay sending the trigger to the client TIs, each TI can delay sending the trigger to the ADC
- Probably the 21us delay due to the beam transit between INJ and the Hall would be compensated for at the TI-bridge
- William says there are three points we can put a delay in the trigger signal: the master TI can add delay between the trigger input and sending the trigger, the TI-bridge can delay sending the trigger to the client TIs, each TI can delay sending the trigger to the ADC
- Brynne is packing up the two ADCs to be sent to JLab
- Michael asks Daryl what needs to be done other than the TI test
- Daryl suggests changing the QSFP to be a SFP+, which would still support the 10G link
- Daryl suggests changing the back panel clock and test connectors from twin-ax connectors to pairs of SMA connectors
- Bryerton had a complaint about the SD card holder; Daryl asks if anyone has a preference for the type of SD card holder
- Discussing the single-ended boards for the beam monitor signals
- The board design has positions for single-ended termination resistors, and to support either the twin-ax or single-ended BNC connectors. It would be best to have the single-ended boards built by the vendor, rather than modifying them after production. So we need to be sure how many of the single-ended boards we would want.
