Difference between revisions of "IntegrationDaq 220715"
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Back to [[Main_Page|Main Page]] >> [[DAQ Meetings|Data Acquisition Meetings]] >> [[DAQ Meetings#Integrating mode DAQ meetings|Integrating mode DAQ meetings]] | Back to [[Main_Page|Main Page]] >> [[DAQ Meetings|Data Acquisition Meetings]] >> [[DAQ Meetings#Integrating mode DAQ meetings|Integrating mode DAQ meetings]] | ||
− | [[IntegrationDaq_220617 | previous meeting]] << >> [[ | + | [[IntegrationDaq_220617 | previous meeting]] << >> [[IntegrationDaq_220812 | following meeting]] |
== Meeting information == | == Meeting information == | ||
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== Minutes == | == Minutes == | ||
− | Recording at zoomgov: | + | Recording at zoomgov: [https://jlab-org.zoomgov.com/rec/share/y0CnaPXzs3MlukDXcSOJn-x6B4i9HXtw4yS6RiZuhNqAwgy1PFNOQHMwa2Q8M-Vh.WTx6m4P57shtmX7C?startTime=1657900529000] |
− | Participants: | + | Participants: M. Gericke, B. Shaw, C. Zorn, R. Michaels, B. Moffit, W. Gu, P. King, C. Cuevas, B. Blaikie |
+ | |||
+ | * Status of the integrator board at JLab | ||
+ | ** Setting up a simple case for the board. Waiting for the FPGA module to arrive. Once we have the FPGA and it is in the chassis, it would go to William and Bryan. | ||
+ | * Bryerton reminds us that we need to formalize the requested integrator modes. Bob, Micheal, and Paul will discuss. | ||
+ | * Michael reports that Jie has fully assembled five of the base+dual amps and is bench testing them | ||
+ | ** The plan would be to keep one at Manitoba, and to send the others out to other groups | ||
+ | * There are plans to place combined orders between JLab and OU for both the VTPs and the TI modules. Details are still being worked out. |
Latest revision as of 15:42, 26 August 2022
Back to Main Page >> Data Acquisition Meetings >> Integrating mode DAQ meetings
previous meeting << >> following meeting
Meeting information
Meeting time: 12:00pm Eastern Zoom connection information Join ZoomGov Meeting https://jlab-org.zoomgov.com/j/1603800887?pwd=aXVmSnN6aWZWN3RBdXB4RUhGckZJdz09 Meeting ID: 160 380 0887 Passcode: 903612 US Tool free phone: (833) 568 8864 Find your local number: https://jlab-org.zoomgov.com/u/ab8341cjcG
Agenda
- Activity updates
- General discussion
Open Issues to be followed up later
- Discussions with M. Pitt & J. Musson to understand the beam monitor signals we'll be getting
- Draft timing diagram: DocDB 790
- Michael, Bob, Brynne, and Paul should put together a list of the integrator running modes we would like to have available
Minutes
Recording at zoomgov: [1]
Participants: M. Gericke, B. Shaw, C. Zorn, R. Michaels, B. Moffit, W. Gu, P. King, C. Cuevas, B. Blaikie
- Status of the integrator board at JLab
- Setting up a simple case for the board. Waiting for the FPGA module to arrive. Once we have the FPGA and it is in the chassis, it would go to William and Bryan.
- Bryerton reminds us that we need to formalize the requested integrator modes. Bob, Micheal, and Paul will discuss.
- Michael reports that Jie has fully assembled five of the base+dual amps and is bench testing them
- The plan would be to keep one at Manitoba, and to send the others out to other groups
- There are plans to place combined orders between JLab and OU for both the VTPs and the TI modules. Details are still being worked out.