IntegrationDaq 250110

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Meeting information

 Meeting time:  1:00pm Eastern
 
 Zoom connection information is sent out by email; please reach out to Paul if you don't have the current link.

Agenda

• Activity updates
• General discussion
  • Scheduling of the new DAQ meeting time

Minutes

Recording at zoomgov:

Participants: S. Malace, R. Michaels, P. King, W. Gu, B. Blaikie, A. Sen, D. Bishop, Z. Ji, J. Pan, S. Chatterjee, R. Fair, J. Shirk, M. Gericke, R. Conaway, C. Cuevas, S. Regmi

• Michael reports on the testing of the first 10 production integrating ADCs
  • They had noticed in early December that they couldn't pull data from them. Testing through December initially suggested it was a firmware issue, but it was found that the SOM-to-board connection was somewhat intermittent. Daryl and Bryerton realized that there is a mistake in the BOM: one of the three headers for the SOM was specified as different but should have been all the same. The different one is slightly higher, making the connection kind of flaky
  • This different connector was present in the BOM for rev0 and rev1, but the vendor had accidentally used the same part for all three connectors, and just used the different one for these rev2 boards.
  • If you push the SOM in just the right way we can pull data from all the ADCs correctly. Daryl thinks the boards are basically okay. Also, Bryerton was able to read data through the fiber.
  • Michael has reached out to the vendor to see if they would be able to change the connectors, and then do a quick retest of those. Then go to production.
  • Michael guesses we'd have the full set of production boards late in March. Maybe be able to get a rev2 board to JLab in February
• Bryan is not on the call to report on the firmware progress. William reminds us that Bryan has been having an issue reading the ADC data
  • We need to check in with Bryan about what is not working
  • It is possible that Bryan needs a set of firmware updates from Bryerton.
• Paul is placing the orders for the network switches. Need to follow up with Michael and William about the transceivers for the data and TI connections to the ADCs.
• Chris reports that all of the FADCv3 boards for all the halls have been received, and testing is in progress
  • The Hall D firmware for the v3 boards is done
  • The driver and library are not quite ready
• Simona reports on the ESB
  • One crate is fully operational, and she has taken some data in it
  • She has a draft VTP firmware that can take an OR of different groups of channels and then AND between them; this is close to what we'd want for the MOLLER trigger
  • The second crate is set up except it is missing the FADC
  • Simona will draft a channel layout concept that works well with the VTP firmware, and circulate it for discussion
• The pion detector test stand is in the Test Lab
  • They are missing a pulser for that; Simona will be able to lend one in use by ECal, but will ask Paul if he can get one using the DAQ budget
• Arindam is in communication with Hanjie about setting up a CODA control PC for the integrating DAQ test stand
  • We'd like to have this ready for when we can transition the integrating ADCs from firmware development to getting experience working with them in CODA
• W&M test stand
  • Sayak is getting the HV and LV crates set up in the W&M high bay; he'll need to discuss with Paul to be able to communicate with them. We need one network port for each of them
  • Brynne will check with Paul in a week or two about getting a rev1 integrating ADC set up at W&M
  • Right now there is one Front Flush segment set up with the following quartz elements: Ring 6 (UMass), Ring 5 FF (SEG-0), Ring 4 (SEG-0), Ring 3 (SEG-0), Ring 2 (SEG-0)
  • Within the next few weeks both segments at W&M should have the production quartz and be fully running
• Paul will send a poll out later today to decide on a meeting time for the spring. Keeping the current time slot is less convenient for Paul due to his class starting at 2pm