IntegrationDaq 211201

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Meeting information

 Meeting time:  3:00pm Eastern
 
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Agenda

• Activity updates
  • Status of 16-ch. integrator firmware development
• General discussion

Open Issues to be followed up later

1. Discussions with M. Pitt & J. Musson to understand the beam monitor signals we'll be getting
2. Draft timing diagram: DocDB 790
3. Michael, Bob, Brynne, and Paul should put together a list of the integrator running modes we would like to have available

Minutes

Participants: P. King, C. Cuevas, W. Gu, M. Gericke, J. Pan, R. Michaels, B. Blaikie, J. Fast

• Update on the integrator. Both Daryl and Bryerton are out on vacation through the end of the year. Daryl sent the following set of updates:
  • The problem with the XU1 being fried was related to a power-up sequencing error. This was fixed by removing a part that is not essential to the module operation
  • The two modules at TRIUMF have been modified to correct other minor problems
  • Both ADC boards have been powered up through the POE and external power connections successfully
  • Both ADC boards are booting correctly and are ready for firmware development
  • Not sure if Michael wants to do their own modifications or send them to TRIUMF
  • It's unlikely that Bryerton will make any significant progress on the firmware until next year
• Other discussion
  • Michael will probably send the other three boards to TRIUMF for the modifications
  • Discussion of the test stand development
    • I have two crates set up at OU and am waiting for the CPUs (expected ~15 DEC). I have a scaler module and digital gate generator to begin with.
    • Bob talks about the JLab test stand where we have the FADC and VETROC for event mode testing; this will also be shared for Compton DAQ testing
  • I need to get the list of anticipated module counts to Chris; we should then see if we can start to order components, etc.