IntegrationDaq 210326

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Meeting information

 Meeting time:  3:30pm Eastern
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  • Activity updates
  • Discussion of findings from the 60% review related to the integration DAQ

Here is the report from the review committee, March 26

Reminder of the review materials

  • General discussion
    • Next meeting would be 9 April


Participants: B. Blaikie, B. Moffit, D. Bishop, J. Pan, M. Gericke, R. Michaels, P. King

  • Updates on recent activities
    • Bryan: no new update
    • Daryl is going through the PCB layout and has to make several changes, including changing the SOM to one with more high-speed pins. The SOM is a compatible FPGA to the one we had, and we need to get more high-performance pins; it's still an Ultrascale. Switching the SOM would allow two lanes for the ADC communication. This would be the Mercury+ XU1 from Enclustra instead of the XU8.
      • This SOM uses the same evaluation board
      • Daryl thinks we probably can use the least expensive of the XU1 models
    • Michael: they are still getting set up for their bench tests, but are having some networking issues with the evaluation board
    • Michael: Update for the HVMAPS --- Nick Berger from Mainz will collaborate with us on the HVMAPS. The Mainz concept is to have the HVMAPS connected by fiber to an FPGA at some distance. Maybe we can use the same FPGA as the integrating ADCs, and can use the developments for them to integrate the HVMAPS with CODA.
  • Discussion of the 60% review closeout
    • Several recommendations are related to our plans for how to set up the grounds
      • I comment that the counting mode DAQ signals will have their grounds connected at the fast amplifiers. Jie is working on a new base design which will switch the ground connections in addition to the signal connections
    • Bob comments that we have a milestone in October for the prototype test of the integrating ADC. This should include testing the integration with CODA.
    • The final design deadline is early next year.
  • General discussion
    • Michael asks if we should ask Enclustra about the number of SOM we plan to buy (about 40 SOM in total). Daryl agrees its a good idea to let them know the number and when we'd want them. Daryl also recommends putting in an order for the ADC chips also.
      • Daryl asks how many prototypes we would make for the end of this year. Michael suggests making 5 prototypes (TRIUMF, Manitoba, JLab, Mainz, plus one more)
      • I ask about how many available spares we would want to have. Recall that the base CFI called for the ~32 modules. We may want 4 spares, or more. Michael says there is a fair bit of flexibility in the CFI, and we can also look at other funds to support
    • Daryl asks about the housing for the module. Eventually we will need more specifics for how the cooling flow and power connections are made to the integrators, and so on. Jie and Michael will confirm for next meeting that the power supplies are part of the CFI project.
      • Daryl also comments that the connectors might be a little close together for convenience of plugging and unplugging cables
    • In a previous meeting, Daryl had suggested having a separate design for single-ended signals.
      • Instead Daryl suggests that the easiest way may be to handle it would be to have a switch (or jumper?) to ground one side of the differential input pair, and then have an adapter cable to patch from a single-ended BNC cable to the active line of the differential connector. This could be perhaps some sort of bulkhead panel.