Difference between revisions of "IntegrationDaq 250306"
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Recording at zoomgov: | Recording at zoomgov: | ||
| − | Participants: | + | Participants: W. Gu, P. King, M. Gericke, A. Sen, B. Blaikie, C. Cuevas, S. Regmi, Z. Ji, J. Pan, R. Conaway, H. Liu, D. McNulty, B. Moffit, R. Fair, D. Bishop, K. Dehmelt, S. Malace, R. Michaels |
| + | |||
| + | * Michael | ||
| + | ** rev2 status | ||
| + | *** All the PCBs are done (38 for MOLLER and 12 for P2) | ||
| + | *** The first 10 boards and the socket issue preventing booting; two were fixed at TRIUMF, two were fixed in Toronto and returned to Manitoba, the other six are being sent to China for the socket repair | ||
| + | *** All four of the fixed boards now work without problems, after a firmware update | ||
| + | *** Bittele now has the go-ahead to assemble the rest of the boards. | ||
| + | ** One of the boards has been tested with the fiber readout. | ||
| + | *** Can take 4 seconds with almost full sampling with no skipped samples. Have zero alignment errors in the data | ||
| + | ** The firmware block "subsystem_capture" does the integration mode readout. | ||
| + | *** It is disabled right now. | ||
| + | *** It needs an "enable" and "start" signal coming from the TI; Bryerton says this ought to be fairly straightforward | ||
| + | ** One of Michael's boards has an issue booting from PoE; he is going to send it to Daryl to look at. Daryl will send the other two back to Michael. | ||
| + | * Daryl | ||
| + | ** He is getting someone else in his group, Chris Pearsen, to pick up the firmware updates for the enable and start | ||
| + | * Bryan | ||
| + | ** He is able to run the ROC on the ADC, and he has a ROC that can readout the TI block. This is on a rev1 board. | ||
| + | ** In Bryan's test he was using a VME TI to send the clock and trigger to the integrator | ||
| + | ** Michael will send one of the rev2 boards to Bryan soon. | ||
| + | ** Bryan hasn't looks at the DMA portion to get the ADC data yet | ||
| + | * Michael says that Bryerton had to turn off some part of the firmware for the TI | ||
| + | ** He'll ask Bryerton to send more details to he and Bryan | ||
| + | * Arindam and Chris will get together to hand off a helicity decoder board. The driver library is available at https://code.jlab.org/fedaq/drivers/helicity_decoder | ||
| + | * Simona will meet with Bill Gunning tomorrow to get the FADCv3 modules and then store them with the ESB test stand | ||
| + | ** Bryan has the readout library ready for the FADCv3 Hall D firmware (https://code.jlab.org/fedaq/drivers/faV3) | ||
Latest revision as of 16:47, 6 March 2025
Back to Main Page >> Data Acquisition Meetings >> Integrating mode DAQ meetings
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Meeting information
Meeting time: 11:00am Eastern Location at JLab: CC F226 Zoom connection information is sent out by email; please reach out to Paul if you don't have the current link.
Agenda
- Activity updates
- General discussion
Minutes
Recording at zoomgov:
Participants: W. Gu, P. King, M. Gericke, A. Sen, B. Blaikie, C. Cuevas, S. Regmi, Z. Ji, J. Pan, R. Conaway, H. Liu, D. McNulty, B. Moffit, R. Fair, D. Bishop, K. Dehmelt, S. Malace, R. Michaels
- Michael
- rev2 status
- All the PCBs are done (38 for MOLLER and 12 for P2)
- The first 10 boards and the socket issue preventing booting; two were fixed at TRIUMF, two were fixed in Toronto and returned to Manitoba, the other six are being sent to China for the socket repair
- All four of the fixed boards now work without problems, after a firmware update
- Bittele now has the go-ahead to assemble the rest of the boards.
- One of the boards has been tested with the fiber readout.
- Can take 4 seconds with almost full sampling with no skipped samples. Have zero alignment errors in the data
- The firmware block "subsystem_capture" does the integration mode readout.
- It is disabled right now.
- It needs an "enable" and "start" signal coming from the TI; Bryerton says this ought to be fairly straightforward
- One of Michael's boards has an issue booting from PoE; he is going to send it to Daryl to look at. Daryl will send the other two back to Michael.
- rev2 status
- Daryl
- He is getting someone else in his group, Chris Pearsen, to pick up the firmware updates for the enable and start
- Bryan
- He is able to run the ROC on the ADC, and he has a ROC that can readout the TI block. This is on a rev1 board.
- In Bryan's test he was using a VME TI to send the clock and trigger to the integrator
- Michael will send one of the rev2 boards to Bryan soon.
- Bryan hasn't looks at the DMA portion to get the ADC data yet
- Michael says that Bryerton had to turn off some part of the firmware for the TI
- He'll ask Bryerton to send more details to he and Bryan
- Arindam and Chris will get together to hand off a helicity decoder board. The driver library is available at https://code.jlab.org/fedaq/drivers/helicity_decoder
- Simona will meet with Bill Gunning tomorrow to get the FADCv3 modules and then store them with the ESB test stand
- Bryan has the readout library ready for the FADCv3 Hall D firmware (https://code.jlab.org/fedaq/drivers/faV3)
