Difference between revisions of "IntegrationDaq 230113"

Revision as of 16:45, 13 January 2023

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Meeting information

 Meeting time:  12:00pm Eastern
 
 Zoom connection information
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 https://jlab-org.zoomgov.com/j/1603800887?pwd=aXVmSnN6aWZWN3RBdXB4RUhGckZJdz09
 
 Meeting ID: 160 380 0887
 Passcode: 903612
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Agenda

• Activity updates
  • Bryerton: Quick notes on the TI test
    • Verified all signals were locked to clock, with no apparent jitter
    • Signal from genoutp verilog array used appears to be SYNC signal (the purple signal). Could not get 'trigger' signal to appear on digitizer side
    • PCIe card signal shown is from 3rd pair on TIpcie card (the yellow signal)
    • Commands used to move SYNC signal from zero to full scale range on digitizer module:
      devmem 0x80000050 32 0x00000000 (712ns before of sync from TIpcie)
      devmem 0x80000050 32 0x0000FF00 (312ns after sync from TIpcie)
    • Command used for screenshots
      devmem 0x80000050 32 0x0000B600 (sync inside trigger window)
      devmem 0x80000050 32 0x0000FF00 (sync outside trigger window, post-trigger window)
    • DIP position from pin 1 to pin 6: 100010
• General discussion

Open Issues to be followed up later

1. Discussions with M. Pitt & J. Musson to understand the beam monitor signals we'll be getting
2. Draft timing diagram: DocDB 790
3. Michael, Bob, Brynne, and Paul should put together a list of the integrator running modes we would like to have available

Minutes

Recording at zoomgov:

Participants: