Difference between revisions of "Digital BCM Meeting, 2021 January 07"

From Moller Wiki
Jump to: navigation, search
(→‎Agenda)
Line 23: Line 23:
 
*  General discussion
 
*  General discussion
 
* [https://moller.jlab.org/wiki/index.php/File:LBL_BCM_datastream(1).pdf  LBL BCM data structure]
 
* [https://moller.jlab.org/wiki/index.php/File:LBL_BCM_datastream(1).pdf  LBL BCM data structure]
 +
 +
== Minutes ==
 +
Attendees: Paul, Bob, Yuan, Yury, Ernst, Shujie
 +
 +
* Experiment requirements:
 +
** BCM info to integrating mode and counting mode DAQ
 +
** BPM info at low current (100 pA) for counting mode
 +
 +
* Proposed setup:
 +
** Integrate the BCM/server system to main CODA as a ROC. TI controls readout, and data output through ethernet cable.
 +
** Ideally, the FPGA on BCM will process the raw data (output at ~2kHz) and communicate with TI ('''TODO: check with Bryan from DAQ group to see if this is possible''' ) so that we can drop the server to increase system stability.
 +
** Helicity window signal (500ns on, 10ns off) to BCM.
 +
*** is the helicity signal in sync with 10MHz clock? (very likely yes)
 +
*** how to define the rising edge of helicity window (~50ns ??)
 +
*** need to sync the helicity with BCM input signal. Use the LED delta signal to check sync?

Revision as of 21:19, 7 January 2021

Back to Main Page >> Data Acquisition Meetings


Meeting information

 Meeting time:  2:00pm Eastern
 
 BlueJeans calling instructions:
 Toll-Free Number (U.S.&  Canada):  888-240-2560
 Other BlueJeans access phone numbers are listed at https://www.bluejeans.com/premium-numbers
 
 Bluejeans CODE:                    641 252 323
 Bluejeans link: https://bluejeans.com/641252323

Agenda

  • Control signal inputs: integrate gate or "start of integration"?
  • Possible readout ideas
    • Each unit as stand-alone ROC similar to integrating ADCs
    • Units are read by a computer with TI-pcie running a PC-ROC
    • Units communicate with a VXS module (such as SSP) in a VXS-ROC
  • Data structure; what is reported?
    • Integrating ADCs plan to have: sum over window, sum of squares (to calculate RMS within window), minimum sample value, maximum sample value; full window and four sub-blocks. Integrating ADCs would also have a waveform mode.
  • General discussion
  • LBL BCM data structure

Minutes

Attendees: Paul, Bob, Yuan, Yury, Ernst, Shujie

  • Experiment requirements:
    • BCM info to integrating mode and counting mode DAQ
    • BPM info at low current (100 pA) for counting mode
  • Proposed setup:
    • Integrate the BCM/server system to main CODA as a ROC. TI controls readout, and data output through ethernet cable.
    • Ideally, the FPGA on BCM will process the raw data (output at ~2kHz) and communicate with TI (TODO: check with Bryan from DAQ group to see if this is possible ) so that we can drop the server to increase system stability.
    • Helicity window signal (500ns on, 10ns off) to BCM.
      • is the helicity signal in sync with 10MHz clock? (very likely yes)
      • how to define the rising edge of helicity window (~50ns ??)
      • need to sync the helicity with BCM input signal. Use the LED delta signal to check sync?
Retrieved from "https://moller.jlab.org/wiki/index.php?title=Digital_BCM_Meeting,_2021_January_07&oldid=1478"