Difference between revisions of "Digital BCM Meeting, 2021 January 07"

Revision as of 22:36, 5 January 2021

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Meeting information

 Meeting time:  2:00pm Eastern
 
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Agenda

• Control signal inputs: integrate gate or "start of integration"?
• Possible readout ideas
  • Each unit as stand-alone ROC similar to integrating ADCs
  • Units are read by a computer with TI-pcie running a PC-ROC
  • Units communicate with a VXS module (such as SSP) in a VXS-ROC
• Data structure; what is reported?
  • Integrating ADCs plan to have: sum over window, sum of squares (to calculate RMS within window), minimum sample value, maximum sample value; full window and four sub-blocks. Integrating ADCs would also have a waveform mode.
• General discussion