View source for IntegrationDaq 220128

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== Meeting information ==
  '''Meeting time:'''  12:00pm Eastern
  
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== Agenda ==
*  Activity updates
**  Status of 16-ch. integrator firmware development
*  General discussion

=== Open Issues to be followed up later ===
# Discussions with M. Pitt & J. Musson to understand the beam monitor signals we'll be getting
# Draft timing diagram: [https://moller.jlab.org/cgi-bin/DocDB/private/ShowDocument?docid=790 DocDB 790]
# Michael, Bob, Brynne, and Paul should put together a list of the integrator running modes we would like to have available

== Minutes ==
Recording at zoomgov:  [https://jlab-org.zoomgov.com/rec/share/1ffQVJ5eb2-w6irpMLjGNtYMNBo8FBLndwK_XH0dwjBUcAL_D9Ki3J94niMT8ebP.sqUcYcFyMPL5SP5j] Passcode: kg$?3WUr

Participants:  R. Michaels, B. Moffit, D. Bishop, J. Pan, B. Blaikie, B. Shaw, W. Gu, P. King, J. Fast

*  Activity updates
**  Bryerton is working on the clock cleaner.  After that he will work on verifying the ADCs, and then do loopback tests of the TI transceiver.
***  He and William discuss the reference clock on the TI connection
**  Daryl asks about the plan for modifying the three integrators at UM.  Michael had planned to send them back to TRIUMF; Jie will follow up with him about the status of that.
**  Bryerton asks about the requests for the different run modes we want for the integrator.  The subgroup had not discussed this.  Paul will follow up with Michael, Bob, Jie, and Brynne about this for next meeting.
**  Jie has been working on the new base design incorporating the dual-mode preamplifier, but is not ready to share details yet
*  Discussion of the CODA development effort
**  Bryan will get JLab's development board back from William soon to work on porting CODA to the processor.
**  Daryl and Bryerton expect that they could be ready in ~6 weeks to ship the integrators to JLab
***  They'd plan to check the following hardware functionality:  clock cleaner, interface to ADCs, TI loopback test.
**  When do we need to have demonstrated CODA on the board and exactly what do we want to demonstrate?
***  I would like to have demonstrated CODA running on the board and collecting data from the ADCs by the 90% design review (penciled in for the first week of June), but it may be enough to show we have CODA running and that we can do the ADC readout with the Petalinux system as used in the 2-channel prototype.
***  We should get with Michael about when he'd want to go ahead with the full procurement, and what we need to demonstrate before we're ready to go ahead with the procurement.
**  Daryl asks about the plans for evaluating the signal integrity
***  The testing at JLab will be done by Bob and I in the JLab test stand, perhaps using Qweak/HAPPEX preamps and so on.  Bryan and William would be doing the TI testing
***  The Manitoba testing program would use the new bases and preamps to check the signal integrity
***  Plan on sending two modules to Manitoba, two modules to JLab and keeping one at TRIUMF